see Victor's 4-bit processor:
... the heart of the processor: a microcode instruction sequencer. This circuit turns instruction codewords into control signals that activate other processor components which in turn perform operations.
and this sequencer:
http://www.vttoth.com/vicproc_seq.htm
Perhaps the most interesting question with any processor is this: how do instruction codes (i.e., code words in memory) get turned into electrical signals that in turn trigger various events in the processor, altering its internal state?
as for address decoding this can be done a la ap0201 making use of 74LS573 latch which latches top 8 bits of (15 bit) address and then we can deliver bottom 7 bits straight from the PIC processor. then tell it to read or write to that address (within 32K NVRAM) - program and/or data memory.
CPU organisation notes::
images/cpu.jpg
so far we can read and write opcodes/data to/from memory
this is the work of the control unit which opens and closes gates to effect the circuits of execution
(to/from memory:
http://www.cellmatrix.com/entryway/products/applications/smallMemory.html
)
1. Fetch the instruction into an internal instruction register 2. Decode the instruction 3. Select (calculate) the operands (registers) used by the instruction 4. Fetch the operands from memory (CISC only) 5. Execute the instruction 6. Store (write) the result back in the proper place.
1) registers: (immediate storage), accumulator (or define registers such as memory address, memory data, instruction register
D Flip-flop or D Latches
from Wikipedia ( http://en.wikipedia.org/wiki/User:B_rip )::::
The register operations of a digital system are defined by:
• The set of registers in the system
• The microoperations that are performed on the data stored in the registers
• The control that “orchestrates” the sequence of operations in the system
and:
Just as assembly language reflects the architecture of the individual microprocessor, the registers and the elementary operations performed on the data stored in the registers (called microoperations) are described using a “symbolic notation” referred to as a Register Transfer Language (RTL).
A Hardware Description Languages (HDL), like Verilog, also allows us to describe these microoperations. When taken in the context of an HDL behavioral description, these microoperations are collectively known as the Register Transfer Level (RTL). To avoid confusion, for this class, RTL will always be defined as “Register Transfer Language” and alternative terminology (i.e., Dataflow and Behavioral) will be used when describing a Verilog description of a microoperation.
D ← A + B
In this simple example, RTL notation is used to show the contents of registers A and B acted upon by the addition operator with the result placed into register D.
register file and ALU is known as data path.
2) control unit: microcode sequencer (pulses of microcode/data to ALU) - control gates decode the instruction sending signals to ALU or memory - circuits are reconfigured
microprogram - stored sequences in control memory - further abstraction
or hardwired
3) ALU (as below) - combinatorial logic is used - encoded by x bits to effect required arithmetic operation
MUXes and decoders and gates
4) address decoding and memory
5) program counter - binary counter
how implemented on CPU?
fetch instruction (from memory address - question of addressing), decode , fetch result, increment program counter
and on an FPGA?
question also of how address decoding functions
1) 240 gate as oscillator with electrolytic (10uF) to GND and 1M VR across gate. feeds into array of 74hc14 with inputs to gate pulled by VRs (1M) to GND and entry to next gate across 0.22uF capacitor. experimented with various diode, LED and feedback techniques (and result fed through another 240 gate without VR) but
not so satisfying results
as per:
http://library.solarbotics.net/circuits/misc_sound_tgray.html